The present invention relates to a logarithmic amplifier circuit and, more particularly, to a logarithmic amplifier circuit suited for use in a video frequency amplifier or an intermediate frequency amplifier of radio equipment.
A conventional logarithmic amplifier circuit of a kind to which the present invention relates and which is realized by a bipolar integrated circuit is disclosed in, for example, U.S. Pat. No. 4,680,553. Also, one realized by a MOS integrated circuit is disclosed in, for example, Japanese Patent Application Kokai No. Sho 62(1987)-292,010.
The circuit disclosed in the former, that is, U.S. Pat. No. 4,680,553, is a logarithmic amplifier circuit of a type well known as being a continuous detecting system. The intermediate frequency amplifier comprises a plurality, n stages (n&gt;1), of amplifying units connected in cascade, each unit being of differential amplifier formed by bipolar transistors. To each input of the respective stages of the amplifying units and an output of the final stage amplifying unit are connected a plurality, that is, n+1 in number, of full-wave rectifiers (detectors) made up of paired biopolar transistors. The outputs from the respective full-wave rectifiers are substantially of hyperbolic functions and, these outputs are connected so as to be added together thereby producing a logarithmic output.
The logarithmic output is such that, since the dynamic range of the input signal level results in being compressed, it can easily be shown by a signal intensity or strength even when a measuring instrument with a small dynamic range, such as an ordinary voltmeter, is used.
The information disclosed in the former also covers that relating to means for improving a dynamic range for input signal in which, in order to enhance the accuracy of logarithmic characteristics, a resistor is inserted to each emitter of the paired bipolar transistors constituting the above-mentioned full-wave rectifiers.
The logarithmic amplifier circuit disclosed in the latter, that is, Japanese Patent Application Kokai No. Sho 62(1987)-292,010, relates also as in the former to a logarithmic amplifier circuit of a well known continuous detecting type. Here, the transistors used therein are MOS transistors and an intermediate frequency amplifier is formed by a plurality, n stages, of MOS transistor differential circuits connected in cascade. To each input of the respective stages and the output of the final stage are connected respectively two pairs of the MOS transistors of which the ratio of W/L, that is, the ratio of gate-width W to the gate-length L, is 1/K (K&gt;1), in which the outputs are opposite to each other, and in which the drains of the MOS transistors whose ratio W/L are the same are connected together whereby a full-wave rectifier is formed. In this configuration, the logarithmic output results from the arrangement wherein all of the same phase outputs of two pairs of differentially paired transistors (n+1 in number) are connected together or in common.
As to the conventional logarithmic amplifier circuits referred to above, the means as explained hereunder have been used in an attempt to enhance the accuracy of logarithmic characteristics but there are accompanying problems.
First, in the case of bipolar integrated circuits, there have been problems, as pointed out in, for example, the U.S. Pat. No. 4,680,553 referred to above. That is, since high accuracy of logarithmic characteristics is due to the expansion of an input dynamic range obtained in exchange of the reduction in the gain in the rectifier by the insertion of emitter resistors in the differential pair transistors constituting the rectifier, it has been necessitated to raise the power supply voltage in order to compensate the voltage drop caused by such emitter resistors.
Secondly, in the case of MOS integrated circuits, there have also been problems in that, in order to obtain high accuracy of logarithmic characteristics, it has been necessitated to keep the gain per stage low or small and to increase the number of stages of the differential amplifiers constituting a unit amplifier since each of the stages has square characteristics. This of course results in an increase in the scale of circuit and in the consumption of power.